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Hardware-Efficient Squeeze-and-Excitation Networks for Real-Time ECG Anomaly Detection Using hls4ml on FPGAs
By Nitesh Kumar and Ashwani Kumar.
Abstract
This record contains the authors' research preprint, “Hardware-Efficient Squeeze-and-Excitation Networks for Real-Time ECG Anomaly Detection Using hls4ml on FPGAs.” The work presents a hardware-efficient Squeeze-and-Excitation channel-attention network for ECG anomaly detection and its implementation using the open-source hls4ml high-level synthesis framework. The study evaluates the model on the ECG5000 benchmark, performs a fixed-point precision characterization, investigates hls4ml C-simulation behavior, and evaluates FPGA synthesis and hardware performance on a Xilinx xc7z020clg400-1 device. The paper reports software and fixed-point inference performance, hardware resource utilization, inference latency, and software-hardware prediction fidelity. The work also documents a softmax inference issue observed in hls4ml 1.3.0 C-simulation and describes a logit-only conversion approach with external numerically stable softmax. Source code and associated experimental materials are available through the associated GitHub repository. This record is shared as a research preprint and has not undergone peer review through a journal or conference publication process at the time of deposit.






